SURF  1.0
Jesd32bTo16b Entity Reference
+ Inheritance diagram for Jesd32bTo16b:
+ Collaboration diagram for Jesd32bTo16b:

Entities

rtl  architecture
 

Libraries

ieee 

Use Clauses

std_logic_1164 
std_logic_unsigned 
std_logic_arith 
StdRtlPkg  Package <StdRtlPkg>

Generics

TPD_G  time := 1 ns

Ports

wrClk   in sl
wrRst   in sl
validIn   in sl
overflow   out sl
dataIn   in slv ( 31 downto 0 )
rdClk   in sl
rdRst   in sl
validOut   out sl
underflow   out sl
dataOut   out slv ( 15 downto 0 )

Detailed Description

See also
entity

Definition at line 27 of file Jesd32bTo16b.vhd.

Member Data Documentation

◆ TPD_G

TPD_G time := 1 ns
Generic

Definition at line 29 of file Jesd32bTo16b.vhd.

◆ wrClk

wrClk in sl
Port

Definition at line 32 of file Jesd32bTo16b.vhd.

◆ wrRst

wrRst in sl
Port

Definition at line 33 of file Jesd32bTo16b.vhd.

◆ validIn

validIn in sl
Port

Definition at line 34 of file Jesd32bTo16b.vhd.

◆ overflow

overflow out sl
Port

Definition at line 35 of file Jesd32bTo16b.vhd.

◆ dataIn

dataIn in slv ( 31 downto 0 )
Port

Definition at line 36 of file Jesd32bTo16b.vhd.

◆ rdClk

rdClk in sl
Port

Definition at line 38 of file Jesd32bTo16b.vhd.

◆ rdRst

rdRst in sl
Port

Definition at line 39 of file Jesd32bTo16b.vhd.

◆ validOut

validOut out sl
Port

Definition at line 40 of file Jesd32bTo16b.vhd.

◆ underflow

underflow out sl
Port

Definition at line 41 of file Jesd32bTo16b.vhd.

◆ dataOut

dataOut out slv ( 15 downto 0 )
Port

Definition at line 42 of file Jesd32bTo16b.vhd.

◆ ieee

ieee
Library

Definition at line 18 of file Jesd32bTo16b.vhd.

◆ std_logic_1164

std_logic_1164
Package

Definition at line 19 of file Jesd32bTo16b.vhd.

◆ std_logic_unsigned

Definition at line 20 of file Jesd32bTo16b.vhd.

◆ std_logic_arith

std_logic_arith
Package

Definition at line 21 of file Jesd32bTo16b.vhd.

◆ StdRtlPkg

StdRtlPkg
Package

Definition at line 23 of file Jesd32bTo16b.vhd.


The documentation for this class was generated from the following file: