Inheritance diagram for Gtx7RecClkMonitor:
Entities | |
| RTL | architecture |
Libraries | |
| IEEE | |
Use Clauses | |
| STD_LOGIC_1164 | |
| STD_LOGIC_ARITH | |
| STD_LOGIC_UNSIGNED | |
Generics | |
| COUNTER_UPPER_VALUE | integer := 20 |
| GCLK_COUNTER_UPPER_VALUE | integer := 20 |
| CLOCK_PULSES | integer := 5000 |
| EXAMPLE_SIMULATION | integer := 0 |
Ports | |
| GT_RST | in std_logic |
| REF_CLK | in std_logic |
| RX_REC_CLK0 | in std_logic |
| SYSTEM_CLK | in std_logic |
| PLL_LK_DET | in std_logic |
| RECCLK_STABLE | out std_logic |
| EXEC_RESTART | out std_logic |
Detailed Description
- See also
- entity
Definition at line 128 of file Gtx7RecClkMonitor.vhd.
Member Data Documentation
◆ COUNTER_UPPER_VALUE
|
Generic |
Definition at line 130 of file Gtx7RecClkMonitor.vhd.
◆ GCLK_COUNTER_UPPER_VALUE
|
Generic |
Definition at line 131 of file Gtx7RecClkMonitor.vhd.
◆ CLOCK_PULSES
|
Generic |
Definition at line 132 of file Gtx7RecClkMonitor.vhd.
◆ EXAMPLE_SIMULATION
|
Generic |
Definition at line 138 of file Gtx7RecClkMonitor.vhd.
◆ GT_RST
|
Port |
Definition at line 140 of file Gtx7RecClkMonitor.vhd.
◆ REF_CLK
|
Port |
Definition at line 141 of file Gtx7RecClkMonitor.vhd.
◆ RX_REC_CLK0
|
Port |
Definition at line 142 of file Gtx7RecClkMonitor.vhd.
◆ SYSTEM_CLK
|
Port |
Definition at line 143 of file Gtx7RecClkMonitor.vhd.
◆ PLL_LK_DET
|
Port |
Definition at line 144 of file Gtx7RecClkMonitor.vhd.
◆ RECCLK_STABLE
|
Port |
Definition at line 147 of file Gtx7RecClkMonitor.vhd.
◆ EXEC_RESTART
|
Port |
Definition at line 149 of file Gtx7RecClkMonitor.vhd.
◆ IEEE
|
Library |
Definition at line 121 of file Gtx7RecClkMonitor.vhd.
◆ STD_LOGIC_1164
|
Package |
Definition at line 122 of file Gtx7RecClkMonitor.vhd.
◆ STD_LOGIC_ARITH
|
Package |
Definition at line 123 of file Gtx7RecClkMonitor.vhd.
◆ STD_LOGIC_UNSIGNED
|
Package |
Definition at line 124 of file Gtx7RecClkMonitor.vhd.
The documentation for this class was generated from the following file:
- xilinx/7Series/gtx7/rtl/Gtx7RecClkMonitor.vhd
