SURF  1.0
Generics | Ports | Libraries | Use Clauses
GigEthGtp7 Entity Reference
ethernet » GigEthCore » gtp7
+ Inheritance diagram for GigEthGtp7:
+ Collaboration diagram for GigEthGtp7:

Entities

mapping  architecture
 

Libraries

ieee 

Use Clauses

std_logic_1164 
StdRtlPkg  Package <StdRtlPkg>
AxiStreamPkg  Package <AxiStreamPkg>
AxiLitePkg  Package <AxiLitePkg>
EthMacPkg  Package <EthMacPkg>
GigEthPkg  Package <GigEthPkg>

Generics

TPD_G  time := 1 ns
EN_AXI_REG_G  boolean := false
AXI_ERROR_RESP_G  slv ( 1 downto 0 ) := AXI_RESP_SLVERR_C
AXIS_CONFIG_G  AxiStreamConfigType := AXI_STREAM_CONFIG_INIT_C

Ports

localMac   in slv ( 47 downto 0 ) := MAC_ADDR_INIT_C
dmaClk   in sl
dmaRst   in sl
dmaIbMaster   out AxiStreamMasterType
dmaIbSlave   in AxiStreamSlaveType
dmaObMaster   in AxiStreamMasterType
dmaObSlave   out AxiStreamSlaveType
axiLiteClk   in sl := ' 0 '
axiLiteRst   in sl := ' 0 '
axiLiteReadMaster   in AxiLiteReadMasterType := AXI_LITE_READ_MASTER_INIT_C
axiLiteReadSlave   out AxiLiteReadSlaveType
axiLiteWriteMaster   in AxiLiteWriteMasterType := AXI_LITE_WRITE_MASTER_INIT_C
axiLiteWriteSlave   out AxiLiteWriteSlaveType
sysClk62   in sl
sysClk125   in sl
sysRst125   in sl
extRst   in sl
phyReady   out sl
sigDet   in sl := ' 1 '
qPllOutClk   in slv ( 1 downto 0 )
qPllOutRefClk   in slv ( 1 downto 0 )
qPllLock   in slv ( 1 downto 0 )
qPllRefClkLost   in slv ( 1 downto 0 )
qPllReset   out slv ( 1 downto 0 )
gtTxP   out sl
gtTxN   out sl
gtRxP   in sl
gtRxN   in sl

Detailed Description

See also
entity

Definition at line 29 of file GigEthGtp7.vhd.

Member Data Documentation

◆ TPD_G

TPD_G time := 1 ns
Generic

Definition at line 31 of file GigEthGtp7.vhd.

◆ EN_AXI_REG_G

EN_AXI_REG_G boolean := false
Generic

Definition at line 33 of file GigEthGtp7.vhd.

◆ AXI_ERROR_RESP_G

AXI_ERROR_RESP_G slv ( 1 downto 0 ) := AXI_RESP_SLVERR_C
Generic

Definition at line 34 of file GigEthGtp7.vhd.

◆ AXIS_CONFIG_G

AXIS_CONFIG_G AxiStreamConfigType := AXI_STREAM_CONFIG_INIT_C
Generic

Definition at line 36 of file GigEthGtp7.vhd.

◆ localMac

localMac in slv ( 47 downto 0 ) := MAC_ADDR_INIT_C
Port

Definition at line 39 of file GigEthGtp7.vhd.

◆ dmaClk

dmaClk in sl
Port

Definition at line 41 of file GigEthGtp7.vhd.

◆ dmaRst

dmaRst in sl
Port

Definition at line 42 of file GigEthGtp7.vhd.

◆ dmaIbMaster

dmaIbMaster out AxiStreamMasterType
Port

Definition at line 43 of file GigEthGtp7.vhd.

◆ dmaIbSlave

dmaIbSlave in AxiStreamSlaveType
Port

Definition at line 44 of file GigEthGtp7.vhd.

◆ dmaObMaster

dmaObMaster in AxiStreamMasterType
Port

Definition at line 45 of file GigEthGtp7.vhd.

◆ dmaObSlave

dmaObSlave out AxiStreamSlaveType
Port

Definition at line 46 of file GigEthGtp7.vhd.

◆ axiLiteClk

axiLiteClk in sl := ' 0 '
Port

Definition at line 48 of file GigEthGtp7.vhd.

◆ axiLiteRst

axiLiteRst in sl := ' 0 '
Port

Definition at line 49 of file GigEthGtp7.vhd.

◆ axiLiteReadMaster

axiLiteReadMaster in AxiLiteReadMasterType := AXI_LITE_READ_MASTER_INIT_C
Port

Definition at line 50 of file GigEthGtp7.vhd.

◆ axiLiteReadSlave

axiLiteReadSlave out AxiLiteReadSlaveType
Port

Definition at line 51 of file GigEthGtp7.vhd.

◆ axiLiteWriteMaster

axiLiteWriteMaster in AxiLiteWriteMasterType := AXI_LITE_WRITE_MASTER_INIT_C
Port

Definition at line 52 of file GigEthGtp7.vhd.

◆ axiLiteWriteSlave

axiLiteWriteSlave out AxiLiteWriteSlaveType
Port

Definition at line 53 of file GigEthGtp7.vhd.

◆ sysClk62

sysClk62 in sl
Port

Definition at line 55 of file GigEthGtp7.vhd.

◆ sysClk125

sysClk125 in sl
Port

Definition at line 56 of file GigEthGtp7.vhd.

◆ sysRst125

sysRst125 in sl
Port

Definition at line 57 of file GigEthGtp7.vhd.

◆ extRst

extRst in sl
Port

Definition at line 58 of file GigEthGtp7.vhd.

◆ phyReady

phyReady out sl
Port

Definition at line 59 of file GigEthGtp7.vhd.

◆ sigDet

sigDet in sl := ' 1 '
Port

Definition at line 60 of file GigEthGtp7.vhd.

◆ qPllOutClk

qPllOutClk in slv ( 1 downto 0 )
Port

Definition at line 62 of file GigEthGtp7.vhd.

◆ qPllOutRefClk

qPllOutRefClk in slv ( 1 downto 0 )
Port

Definition at line 63 of file GigEthGtp7.vhd.

◆ qPllLock

qPllLock in slv ( 1 downto 0 )
Port

Definition at line 64 of file GigEthGtp7.vhd.

◆ qPllRefClkLost

qPllRefClkLost in slv ( 1 downto 0 )
Port

Definition at line 65 of file GigEthGtp7.vhd.

◆ qPllReset

qPllReset out slv ( 1 downto 0 )
Port

Definition at line 66 of file GigEthGtp7.vhd.

◆ gtTxP

gtTxP out sl
Port

Definition at line 68 of file GigEthGtp7.vhd.

◆ gtTxN

gtTxN out sl
Port

Definition at line 69 of file GigEthGtp7.vhd.

◆ gtRxP

gtRxP in sl
Port

Definition at line 70 of file GigEthGtp7.vhd.

◆ gtRxN

gtRxN in sl
Port

Definition at line 71 of file GigEthGtp7.vhd.

◆ ieee

ieee
Library

Definition at line 18 of file GigEthGtp7.vhd.

◆ std_logic_1164

std_logic_1164
Package

Definition at line 19 of file GigEthGtp7.vhd.

◆ StdRtlPkg

StdRtlPkg
Package

Definition at line 21 of file GigEthGtp7.vhd.

◆ AxiStreamPkg

AxiStreamPkg
Package

Definition at line 22 of file GigEthGtp7.vhd.

◆ AxiLitePkg

AxiLitePkg
Package

Definition at line 23 of file GigEthGtp7.vhd.

◆ EthMacPkg

EthMacPkg
Package

Definition at line 24 of file GigEthGtp7.vhd.

◆ GigEthPkg

GigEthPkg
Package

Definition at line 25 of file GigEthGtp7.vhd.

The documentation for this class was generated from the following file: