SURF  1.0
EthMacRxFifo Entity Reference
+ Inheritance diagram for EthMacRxFifo:
+ Collaboration diagram for EthMacRxFifo:

Entities

rtl  architecture
 

Libraries

ieee 

Use Clauses

std_logic_1164 
StdRtlPkg  Package <StdRtlPkg>
AxiStreamPkg  Package <AxiStreamPkg>
EthMacPkg  Package <EthMacPkg>

Generics

TPD_G  time := 1 ns
DROP_ERR_PKT_G  boolean := true
INT_PIPE_STAGES_G  natural := 1
PIPE_STAGES_G  natural := 1
FIFO_ADDR_WIDTH_G  positive := 10
CASCADE_SIZE_G  positive := 2
FIFO_PAUSE_THRESH_G  positive := 1000
CASCADE_PAUSE_SEL_G  natural := 0
PRIM_COMMON_CLK_G  boolean := false
PRIM_CONFIG_G  AxiStreamConfigType := EMAC_AXIS_CONFIG_C
BYP_EN_G  boolean := false
BYP_COMMON_CLK_G  boolean := false
BYP_CONFIG_G  AxiStreamConfigType := EMAC_AXIS_CONFIG_C
VLAN_EN_G  boolean := false
VLAN_SIZE_G  positive := 1
VLAN_COMMON_CLK_G  boolean := false
VLAN_CONFIG_G  AxiStreamConfigType := EMAC_AXIS_CONFIG_C

Ports

sClk   in sl
sRst   in sl
phyReady   in sl
rxFifoDrop   out sl
mPrimClk   in sl
mPrimRst   in sl
sPrimMaster   in AxiStreamMasterType
sPrimCtrl   out AxiStreamCtrlType
mPrimMaster   out AxiStreamMasterType
mPrimSlave   in AxiStreamSlaveType
mBypClk   in sl
mBypRst   in sl
sBypMaster   in AxiStreamMasterType
sBypCtrl   out AxiStreamCtrlType
mBypMaster   out AxiStreamMasterType
mBypSlave   in AxiStreamSlaveType
mVlanClk   in sl
mVlanRst   in sl
sVlanMasters   in AxiStreamMasterArray ( VLAN_SIZE_G - 1 downto 0 )
sVlanCtrl   out AxiStreamCtrlArray ( VLAN_SIZE_G - 1 downto 0 )
mVlanMasters   out AxiStreamMasterArray ( VLAN_SIZE_G - 1 downto 0 )
mVlanSlaves   in AxiStreamSlaveArray ( VLAN_SIZE_G - 1 downto 0 )

Detailed Description

See also
entity

Definition at line 27 of file EthMacRxFifo.vhd.

Member Data Documentation

◆ TPD_G

TPD_G time := 1 ns
Generic

Definition at line 29 of file EthMacRxFifo.vhd.

◆ DROP_ERR_PKT_G

DROP_ERR_PKT_G boolean := true
Generic

Definition at line 30 of file EthMacRxFifo.vhd.

◆ INT_PIPE_STAGES_G

INT_PIPE_STAGES_G natural := 1
Generic

Definition at line 31 of file EthMacRxFifo.vhd.

◆ PIPE_STAGES_G

PIPE_STAGES_G natural := 1
Generic

Definition at line 32 of file EthMacRxFifo.vhd.

◆ FIFO_ADDR_WIDTH_G

FIFO_ADDR_WIDTH_G positive := 10
Generic

Definition at line 33 of file EthMacRxFifo.vhd.

◆ CASCADE_SIZE_G

CASCADE_SIZE_G positive := 2
Generic

Definition at line 34 of file EthMacRxFifo.vhd.

◆ FIFO_PAUSE_THRESH_G

FIFO_PAUSE_THRESH_G positive := 1000
Generic

Definition at line 35 of file EthMacRxFifo.vhd.

◆ CASCADE_PAUSE_SEL_G

CASCADE_PAUSE_SEL_G natural := 0
Generic

Definition at line 36 of file EthMacRxFifo.vhd.

◆ PRIM_COMMON_CLK_G

PRIM_COMMON_CLK_G boolean := false
Generic

Definition at line 37 of file EthMacRxFifo.vhd.

◆ PRIM_CONFIG_G

◆ BYP_EN_G

BYP_EN_G boolean := false
Generic

Definition at line 39 of file EthMacRxFifo.vhd.

◆ BYP_COMMON_CLK_G

BYP_COMMON_CLK_G boolean := false
Generic

Definition at line 40 of file EthMacRxFifo.vhd.

◆ BYP_CONFIG_G

Definition at line 41 of file EthMacRxFifo.vhd.

◆ VLAN_EN_G

VLAN_EN_G boolean := false
Generic

Definition at line 42 of file EthMacRxFifo.vhd.

◆ VLAN_SIZE_G

VLAN_SIZE_G positive := 1
Generic

Definition at line 43 of file EthMacRxFifo.vhd.

◆ VLAN_COMMON_CLK_G

VLAN_COMMON_CLK_G boolean := false
Generic

Definition at line 44 of file EthMacRxFifo.vhd.

◆ VLAN_CONFIG_G

◆ sClk

sClk in sl
Port

Definition at line 48 of file EthMacRxFifo.vhd.

◆ sRst

sRst in sl
Port

Definition at line 49 of file EthMacRxFifo.vhd.

◆ phyReady

phyReady in sl
Port

Definition at line 51 of file EthMacRxFifo.vhd.

◆ rxFifoDrop

rxFifoDrop out sl
Port

Definition at line 52 of file EthMacRxFifo.vhd.

◆ mPrimClk

mPrimClk in sl
Port

Definition at line 54 of file EthMacRxFifo.vhd.

◆ mPrimRst

mPrimRst in sl
Port

Definition at line 55 of file EthMacRxFifo.vhd.

◆ sPrimMaster

Definition at line 56 of file EthMacRxFifo.vhd.

◆ sPrimCtrl

Definition at line 57 of file EthMacRxFifo.vhd.

◆ mPrimMaster

Definition at line 58 of file EthMacRxFifo.vhd.

◆ mPrimSlave

Definition at line 59 of file EthMacRxFifo.vhd.

◆ mBypClk

mBypClk in sl
Port

Definition at line 61 of file EthMacRxFifo.vhd.

◆ mBypRst

mBypRst in sl
Port

Definition at line 62 of file EthMacRxFifo.vhd.

◆ sBypMaster

Definition at line 63 of file EthMacRxFifo.vhd.

◆ sBypCtrl

Definition at line 64 of file EthMacRxFifo.vhd.

◆ mBypMaster

Definition at line 65 of file EthMacRxFifo.vhd.

◆ mBypSlave

Definition at line 66 of file EthMacRxFifo.vhd.

◆ mVlanClk

mVlanClk in sl
Port

Definition at line 68 of file EthMacRxFifo.vhd.

◆ mVlanRst

mVlanRst in sl
Port

Definition at line 69 of file EthMacRxFifo.vhd.

◆ sVlanMasters

sVlanMasters in AxiStreamMasterArray ( VLAN_SIZE_G - 1 downto 0 )
Port

Definition at line 70 of file EthMacRxFifo.vhd.

◆ sVlanCtrl

sVlanCtrl out AxiStreamCtrlArray ( VLAN_SIZE_G - 1 downto 0 )
Port

Definition at line 71 of file EthMacRxFifo.vhd.

◆ mVlanMasters

mVlanMasters out AxiStreamMasterArray ( VLAN_SIZE_G - 1 downto 0 )
Port

Definition at line 72 of file EthMacRxFifo.vhd.

◆ mVlanSlaves

mVlanSlaves in AxiStreamSlaveArray ( VLAN_SIZE_G - 1 downto 0 )
Port

Definition at line 73 of file EthMacRxFifo.vhd.

◆ ieee

ieee
Library

Definition at line 18 of file EthMacRxFifo.vhd.

◆ std_logic_1164

std_logic_1164
Package

Definition at line 19 of file EthMacRxFifo.vhd.

◆ StdRtlPkg

StdRtlPkg
Package

Definition at line 21 of file EthMacRxFifo.vhd.

◆ AxiStreamPkg

AxiStreamPkg
Package

Definition at line 22 of file EthMacRxFifo.vhd.

◆ EthMacPkg

EthMacPkg
Package

Definition at line 23 of file EthMacRxFifo.vhd.


The documentation for this class was generated from the following file: