SURF  1.0
Generics | Ports | Libraries | Use Clauses
DspAddSub Entity Reference
xilinx » general

Entities

rtl  architecture
 

Libraries

ieee 

Use Clauses

std_logic_1164 
std_logic_unsigned 
std_logic_arith 
StdRtlPkg  Package <StdRtlPkg>

Generics

TPD_G  time := 1 ns
LATENCY_G  integer range 0 to 2 := 0
A_WIDTH_G  integer range 2 to 48 := 2
A_TYPE_G  string := " unsigned "
B_WIDTH_G  integer range 2 to 48 := 2
B_TYPE_G  string := " unsigned "
S_WIDTH_G  integer range 2 to 48 := 2
S_TYPE_G  string := " unsigned "

Ports

clk   in sl
add   in sl := ' 1 '
a   in slv ( ( A_WIDTH_G - 1 ) downto 0 ) := ( others = > ' 0 ' )
b   in slv ( ( B_WIDTH_G - 1 ) downto 0 ) := ( others = > ' 0 ' )
s   out slv ( ( S_WIDTH_G - 1 ) downto 0 )

Detailed Description

See also
entity

Definition at line 27 of file DspAddSub.vhd.

Member Data Documentation

◆ TPD_G

TPD_G time := 1 ns
Generic

Definition at line 29 of file DspAddSub.vhd.

◆ LATENCY_G

LATENCY_G integer range 0 to 2 := 0
Generic

Definition at line 30 of file DspAddSub.vhd.

◆ A_WIDTH_G

A_WIDTH_G integer range 2 to 48 := 2
Generic

Definition at line 32 of file DspAddSub.vhd.

◆ A_TYPE_G

A_TYPE_G string := " unsigned "
Generic

Definition at line 33 of file DspAddSub.vhd.

◆ B_WIDTH_G

B_WIDTH_G integer range 2 to 48 := 2
Generic

Definition at line 35 of file DspAddSub.vhd.

◆ B_TYPE_G

B_TYPE_G string := " unsigned "
Generic

Definition at line 36 of file DspAddSub.vhd.

◆ S_WIDTH_G

S_WIDTH_G integer range 2 to 48 := 2
Generic

Definition at line 38 of file DspAddSub.vhd.

◆ S_TYPE_G

S_TYPE_G string := " unsigned "
Generic

Definition at line 39 of file DspAddSub.vhd.

◆ clk

clk in sl
Port

Definition at line 41 of file DspAddSub.vhd.

◆ add

add in sl := ' 1 '
Port

Definition at line 42 of file DspAddSub.vhd.

◆ a

a in slv ( ( A_WIDTH_G - 1 ) downto 0 ) := ( others = > ' 0 ' )
Port

Definition at line 43 of file DspAddSub.vhd.

◆ b

b in slv ( ( B_WIDTH_G - 1 ) downto 0 ) := ( others = > ' 0 ' )
Port

Definition at line 44 of file DspAddSub.vhd.

◆ s

s out slv ( ( S_WIDTH_G - 1 ) downto 0 )
Port

Definition at line 45 of file DspAddSub.vhd.

◆ ieee

ieee
Library

Definition at line 18 of file DspAddSub.vhd.

◆ std_logic_1164

std_logic_1164
Package

Definition at line 19 of file DspAddSub.vhd.

◆ std_logic_unsigned

std_logic_unsigned
Package

Definition at line 20 of file DspAddSub.vhd.

◆ std_logic_arith

std_logic_arith
Package

Definition at line 21 of file DspAddSub.vhd.

◆ StdRtlPkg

StdRtlPkg
Package

Definition at line 23 of file DspAddSub.vhd.

The documentation for this class was generated from the following file: