SURF  1.0
Generics | Ports | Libraries | Use Clauses
ClkOutBufDiff Entity Reference
xilinx » general
+ Inheritance diagram for ClkOutBufDiff:

Entities

rtl  architecture
 

Libraries

IEEE 
UNISIM 

Use Clauses

STD_LOGIC_1164 
StdRtlPkg  Package <StdRtlPkg>
VCOMPONENTS 

Generics

TPD_G  time := 1 ns
XIL_DEVICE_G  string := " 7SERIES "
RST_POLARITY_G  sl := ' 1 '
INVERT_G  boolean := false

Ports

rstIn   in sl := not RST_POLARITY_G
outEnL   in sl := ' 0 '
clkIn   in sl
clkOutP   out sl
clkOutN   out sl

Detailed Description

See also
entity

Definition at line 27 of file ClkOutBufDiff.vhd.

Member Data Documentation

◆ TPD_G

TPD_G time := 1 ns
Generic

Definition at line 29 of file ClkOutBufDiff.vhd.

◆ XIL_DEVICE_G

XIL_DEVICE_G string := " 7SERIES "
Generic

Definition at line 30 of file ClkOutBufDiff.vhd.

◆ RST_POLARITY_G

RST_POLARITY_G sl := ' 1 '
Generic

Definition at line 31 of file ClkOutBufDiff.vhd.

◆ INVERT_G

INVERT_G boolean := false
Generic

Definition at line 32 of file ClkOutBufDiff.vhd.

◆ rstIn

rstIn in sl := not RST_POLARITY_G
Port

Definition at line 34 of file ClkOutBufDiff.vhd.

◆ outEnL

outEnL in sl := ' 0 '
Port

Definition at line 35 of file ClkOutBufDiff.vhd.

◆ clkIn

clkIn in sl
Port

Definition at line 36 of file ClkOutBufDiff.vhd.

◆ clkOutP

clkOutP out sl
Port

Definition at line 37 of file ClkOutBufDiff.vhd.

◆ clkOutN

clkOutN out sl
Port

Definition at line 38 of file ClkOutBufDiff.vhd.

◆ IEEE

IEEE
Library

Definition at line 18 of file ClkOutBufDiff.vhd.

◆ STD_LOGIC_1164

STD_LOGIC_1164
Package

Definition at line 19 of file ClkOutBufDiff.vhd.

◆ StdRtlPkg

StdRtlPkg
Package

Definition at line 20 of file ClkOutBufDiff.vhd.

◆ UNISIM

UNISIM
Library

Definition at line 22 of file ClkOutBufDiff.vhd.

◆ VCOMPONENTS

VCOMPONENTS
Package

Definition at line 23 of file ClkOutBufDiff.vhd.

The documentation for this class was generated from the following file: