SURF  1.0
Generics | Ports | Libraries | Use Clauses
AxiStreamPacketizer Entity Reference

See also
entity axi
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+ Inheritance diagram for AxiStreamPacketizer:
+ Collaboration diagram for AxiStreamPacketizer:

Entities

rtl  architecture
 

Libraries

ieee 

Use Clauses

std_logic_1164 
std_logic_unsigned 
std_logic_arith 
StdRtlPkg  Package <StdRtlPkg>
AxiStreamPkg  Package <AxiStreamPkg>
SsiPkg  Package <SsiPkg>

Generics

TPD_G  time := 1 ns
MAX_PACKET_BYTES_G  integer := 1440
MIN_TKEEP_G  slv ( 15 downto 0 ) := X " 0001 "
OUTPUT_SSI_G  boolean := true
INPUT_PIPE_STAGES_G  integer := 0
OUTPUT_PIPE_STAGES_G  integer := 0

Ports

axisClk   in sl
axisRst   in sl
sAxisMaster   in AxiStreamMasterType
sAxisSlave   out AxiStreamSlaveType
mAxisMaster   out AxiStreamMasterType
mAxisSlave   in AxiStreamSlaveType

Detailed Description

Definition at line 32 of file AxiStreamPacketizer.vhd.

Member Data Documentation

◆ TPD_G

TPD_G time := 1 ns
Generic

Definition at line 35 of file AxiStreamPacketizer.vhd.

◆ MAX_PACKET_BYTES_G

MAX_PACKET_BYTES_G integer := 1440
Generic

Definition at line 36 of file AxiStreamPacketizer.vhd.

◆ MIN_TKEEP_G

MIN_TKEEP_G slv ( 15 downto 0 ) := X " 0001 "
Generic

Definition at line 37 of file AxiStreamPacketizer.vhd.

◆ OUTPUT_SSI_G

OUTPUT_SSI_G boolean := true
Generic

Definition at line 38 of file AxiStreamPacketizer.vhd.

◆ INPUT_PIPE_STAGES_G

INPUT_PIPE_STAGES_G integer := 0
Generic

Definition at line 39 of file AxiStreamPacketizer.vhd.

◆ OUTPUT_PIPE_STAGES_G

OUTPUT_PIPE_STAGES_G integer := 0
Generic

Definition at line 40 of file AxiStreamPacketizer.vhd.

◆ axisClk

axisClk in sl
Port

Definition at line 44 of file AxiStreamPacketizer.vhd.

◆ axisRst

axisRst in sl
Port

Definition at line 45 of file AxiStreamPacketizer.vhd.

◆ sAxisMaster

sAxisMaster in AxiStreamMasterType
Port

Definition at line 47 of file AxiStreamPacketizer.vhd.

◆ sAxisSlave

sAxisSlave out AxiStreamSlaveType
Port

Definition at line 48 of file AxiStreamPacketizer.vhd.

◆ mAxisMaster

mAxisMaster out AxiStreamMasterType
Port

Definition at line 50 of file AxiStreamPacketizer.vhd.

◆ mAxisSlave

mAxisSlave in AxiStreamSlaveType
Port

Definition at line 51 of file AxiStreamPacketizer.vhd.

◆ ieee

ieee
Library

Definition at line 21 of file AxiStreamPacketizer.vhd.

◆ std_logic_1164

std_logic_1164
Package

Definition at line 22 of file AxiStreamPacketizer.vhd.

◆ std_logic_unsigned

std_logic_unsigned
Package

Definition at line 23 of file AxiStreamPacketizer.vhd.

◆ std_logic_arith

std_logic_arith
Package

Definition at line 24 of file AxiStreamPacketizer.vhd.

◆ StdRtlPkg

StdRtlPkg
Package

Definition at line 26 of file AxiStreamPacketizer.vhd.

◆ AxiStreamPkg

AxiStreamPkg
Package

Definition at line 27 of file AxiStreamPacketizer.vhd.

◆ SsiPkg

SsiPkg
Package

Definition at line 28 of file AxiStreamPacketizer.vhd.

The documentation for this class was generated from the following file: