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SURF
1.0
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Inheritance diagram for AxiStreamDmaV2Write:
Collaboration diagram for AxiStreamDmaV2Write:Entities | |
| rtl | architecture |
Libraries | |
| ieee | |
Use Clauses | |
| std_logic_1164 | |
| std_logic_arith | |
| std_logic_unsigned | |
| StdRtlPkg | Package <StdRtlPkg> |
| AxiStreamPkg | Package <AxiStreamPkg> |
| AxiPkg | Package <AxiPkg> |
| AxiDmaPkg | Package <AxiDmaPkg> |
Generics | |
| TPD_G | time := 1 ns |
| AXI_READY_EN_G | boolean := false |
| AXIS_CONFIG_G | AxiStreamConfigType := AXI_STREAM_CONFIG_INIT_C |
| AXI_CONFIG_G | AxiConfigType := AXI_CONFIG_INIT_C |
| BURST_BYTES_G | integer range 1 to 4096 := 4096 |
| ACK_WAIT_BVALID_G | boolean := true |
Ports | |
| axiClk | in sl |
| axiRst | in sl |
| dmaWrDescReq | out AxiWriteDmaDescReqType |
| dmaWrDescAck | in AxiWriteDmaDescAckType |
| dmaWrDescRet | out AxiWriteDmaDescRetType |
| dmaWrDescRetAck | in sl |
| dmaWrIdle | out sl |
| axiCache | in slv ( 3 downto 0 ) |
| axisMaster | in AxiStreamMasterType |
| axisSlave | out AxiStreamSlaveType |
| axiWriteMaster | out AxiWriteMasterType |
| axiWriteSlave | in AxiWriteSlaveType |
| axiWriteCtrl | in AxiCtrlType := AXI_CTRL_UNUSED_C |
Definition at line 32 of file AxiStreamDmaV2Write.vhd.
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Generic |
Definition at line 34 of file AxiStreamDmaV2Write.vhd.
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Generic |
Definition at line 35 of file AxiStreamDmaV2Write.vhd.
Definition at line 36 of file AxiStreamDmaV2Write.vhd.
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Generic |
Definition at line 37 of file AxiStreamDmaV2Write.vhd.
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Generic |
Definition at line 38 of file AxiStreamDmaV2Write.vhd.
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Generic |
Definition at line 39 of file AxiStreamDmaV2Write.vhd.
Definition at line 42 of file AxiStreamDmaV2Write.vhd.
Definition at line 43 of file AxiStreamDmaV2Write.vhd.
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Port |
Definition at line 45 of file AxiStreamDmaV2Write.vhd.
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Port |
Definition at line 46 of file AxiStreamDmaV2Write.vhd.
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Port |
Definition at line 47 of file AxiStreamDmaV2Write.vhd.
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Port |
Definition at line 48 of file AxiStreamDmaV2Write.vhd.
Definition at line 50 of file AxiStreamDmaV2Write.vhd.
Definition at line 51 of file AxiStreamDmaV2Write.vhd.
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Port |
Definition at line 53 of file AxiStreamDmaV2Write.vhd.
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Port |
Definition at line 54 of file AxiStreamDmaV2Write.vhd.
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Port |
Definition at line 56 of file AxiStreamDmaV2Write.vhd.
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Port |
Definition at line 57 of file AxiStreamDmaV2Write.vhd.
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Port |
Definition at line 58 of file AxiStreamDmaV2Write.vhd.
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Library |
Definition at line 20 of file AxiStreamDmaV2Write.vhd.
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Package |
Definition at line 21 of file AxiStreamDmaV2Write.vhd.
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Package |
Definition at line 22 of file AxiStreamDmaV2Write.vhd.
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Package |
Definition at line 23 of file AxiStreamDmaV2Write.vhd.
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Package |
Definition at line 25 of file AxiStreamDmaV2Write.vhd.
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Package |
Definition at line 26 of file AxiStreamDmaV2Write.vhd.
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Package |
Definition at line 27 of file AxiStreamDmaV2Write.vhd.
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Package |
Definition at line 28 of file AxiStreamDmaV2Write.vhd.