SURF  1.0
Generics | Ports | Libraries | Use Clauses
AxiStreamDmaRead Entity Reference
axi
+ Inheritance diagram for AxiStreamDmaRead:
+ Collaboration diagram for AxiStreamDmaRead:

Entities

rtl  architecture
 

Libraries

ieee 

Use Clauses

std_logic_1164 
std_logic_arith 
std_logic_unsigned 
StdRtlPkg  Package <StdRtlPkg>
AxiStreamPkg  Package <AxiStreamPkg>
AxiPkg  Package <AxiPkg>
AxiDmaPkg  Package <AxiDmaPkg>

Generics

TPD_G  time := 1 ns
AXIS_READY_EN_G  boolean := false
AXIS_CONFIG_G  AxiStreamConfigType := AXI_STREAM_CONFIG_INIT_C
AXI_CONFIG_G  AxiConfigType := AXI_CONFIG_INIT_C
AXI_BURST_G  slv ( 1 downto 0 ) := " 01 "
AXI_CACHE_G  slv ( 3 downto 0 ) := " 1111 "
SW_CACHE_EN_G  boolean := false
PIPE_STAGES_G  natural := 1
PEND_THRESH_G  natural := 0
BYP_SHIFT_G  boolean := false

Ports

axiClk   in sl
axiRst   in sl
dmaReq   in AxiReadDmaReqType
dmaAck   out AxiReadDmaAckType
swCache   in slv ( 3 downto 0 ) := " 0000 "
axisMaster   out AxiStreamMasterType
axisSlave   in AxiStreamSlaveType
axisCtrl   in AxiStreamCtrlType
axiReadMaster   out AxiReadMasterType
axiReadSlave   in AxiReadSlaveType

Detailed Description

See also
entity

Definition at line 32 of file AxiStreamDmaRead.vhd.

Member Data Documentation

◆ TPD_G

TPD_G time := 1 ns
Generic

Definition at line 34 of file AxiStreamDmaRead.vhd.

◆ AXIS_READY_EN_G

AXIS_READY_EN_G boolean := false
Generic

Definition at line 35 of file AxiStreamDmaRead.vhd.

◆ AXIS_CONFIG_G

AXIS_CONFIG_G AxiStreamConfigType := AXI_STREAM_CONFIG_INIT_C
Generic

Definition at line 36 of file AxiStreamDmaRead.vhd.

◆ AXI_CONFIG_G

AXI_CONFIG_G AxiConfigType := AXI_CONFIG_INIT_C
Generic

Definition at line 37 of file AxiStreamDmaRead.vhd.

◆ AXI_BURST_G

AXI_BURST_G slv ( 1 downto 0 ) := " 01 "
Generic

Definition at line 38 of file AxiStreamDmaRead.vhd.

◆ AXI_CACHE_G

AXI_CACHE_G slv ( 3 downto 0 ) := " 1111 "
Generic

Definition at line 39 of file AxiStreamDmaRead.vhd.

◆ SW_CACHE_EN_G

SW_CACHE_EN_G boolean := false
Generic

Definition at line 40 of file AxiStreamDmaRead.vhd.

◆ PIPE_STAGES_G

PIPE_STAGES_G natural := 1
Generic

Definition at line 41 of file AxiStreamDmaRead.vhd.

◆ PEND_THRESH_G

PEND_THRESH_G natural := 0
Generic

Definition at line 42 of file AxiStreamDmaRead.vhd.

◆ BYP_SHIFT_G

BYP_SHIFT_G boolean := false
Generic

Definition at line 43 of file AxiStreamDmaRead.vhd.

◆ axiClk

axiClk in sl
Port

Definition at line 46 of file AxiStreamDmaRead.vhd.

◆ axiRst

axiRst in sl
Port

Definition at line 47 of file AxiStreamDmaRead.vhd.

◆ dmaReq

dmaReq in AxiReadDmaReqType
Port

Definition at line 49 of file AxiStreamDmaRead.vhd.

◆ dmaAck

dmaAck out AxiReadDmaAckType
Port

Definition at line 50 of file AxiStreamDmaRead.vhd.

◆ swCache

swCache in slv ( 3 downto 0 ) := " 0000 "
Port

Definition at line 51 of file AxiStreamDmaRead.vhd.

◆ axisMaster

axisMaster out AxiStreamMasterType
Port

Definition at line 53 of file AxiStreamDmaRead.vhd.

◆ axisSlave

axisSlave in AxiStreamSlaveType
Port

Definition at line 54 of file AxiStreamDmaRead.vhd.

◆ axisCtrl

axisCtrl in AxiStreamCtrlType
Port

Definition at line 55 of file AxiStreamDmaRead.vhd.

◆ axiReadMaster

axiReadMaster out AxiReadMasterType
Port

Definition at line 57 of file AxiStreamDmaRead.vhd.

◆ axiReadSlave

axiReadSlave in AxiReadSlaveType
Port

Definition at line 58 of file AxiStreamDmaRead.vhd.

◆ ieee

ieee
Library

Definition at line 20 of file AxiStreamDmaRead.vhd.

◆ std_logic_1164

std_logic_1164
Package

Definition at line 21 of file AxiStreamDmaRead.vhd.

◆ std_logic_arith

std_logic_arith
Package

Definition at line 22 of file AxiStreamDmaRead.vhd.

◆ std_logic_unsigned

std_logic_unsigned
Package

Definition at line 23 of file AxiStreamDmaRead.vhd.

◆ StdRtlPkg

StdRtlPkg
Package

Definition at line 25 of file AxiStreamDmaRead.vhd.

◆ AxiStreamPkg

AxiStreamPkg
Package

Definition at line 26 of file AxiStreamDmaRead.vhd.

◆ AxiPkg

AxiPkg
Package

Definition at line 27 of file AxiStreamDmaRead.vhd.

◆ AxiDmaPkg

AxiDmaPkg
Package

Definition at line 28 of file AxiStreamDmaRead.vhd.

The documentation for this class was generated from the following file: