SURF  1.0
AxiLiteMaster Entity Reference
+ Inheritance diagram for AxiLiteMaster:

Entities

rtl  architecture
 

Libraries

ieee 

Use Clauses

std_logic_1164 
std_logic_arith 
std_logic_unsigned 
StdRtlPkg  Package <StdRtlPkg>
AxiLitePkg  Package <AxiLitePkg>
AxiLiteMasterPkg  Package <AxiLiteMasterPkg>

Generics

TPD_G  time := 1 ns

Ports

axilClk   in sl
axilRst   in sl
req   in AxiLiteMasterReqType
ack   out AxiLiteMasterAckType
axilWriteMaster   out AxiLiteWriteMasterType
axilWriteSlave   in AxiLiteWriteSlaveType
axilReadMaster   out AxiLiteReadMasterType
axilReadSlave   in AxiLiteReadSlaveType

Detailed Description

See also
entity

Definition at line 29 of file AxiLiteMaster.vhd.

Member Data Documentation

◆ TPD_G

TPD_G time := 1 ns
Generic

Definition at line 32 of file AxiLiteMaster.vhd.

◆ axilClk

axilClk in sl
Port

Definition at line 34 of file AxiLiteMaster.vhd.

◆ axilRst

axilRst in sl
Port

Definition at line 35 of file AxiLiteMaster.vhd.

◆ req

Definition at line 36 of file AxiLiteMaster.vhd.

◆ ack

Definition at line 37 of file AxiLiteMaster.vhd.

◆ axilWriteMaster

Definition at line 38 of file AxiLiteMaster.vhd.

◆ axilWriteSlave

Definition at line 39 of file AxiLiteMaster.vhd.

◆ axilReadMaster

Definition at line 40 of file AxiLiteMaster.vhd.

◆ axilReadSlave

Definition at line 42 of file AxiLiteMaster.vhd.

◆ ieee

ieee
Library

Definition at line 18 of file AxiLiteMaster.vhd.

◆ std_logic_1164

std_logic_1164
Package

Definition at line 19 of file AxiLiteMaster.vhd.

◆ std_logic_arith

std_logic_arith
Package

Definition at line 20 of file AxiLiteMaster.vhd.

◆ std_logic_unsigned

Definition at line 21 of file AxiLiteMaster.vhd.

◆ StdRtlPkg

StdRtlPkg
Package

Definition at line 23 of file AxiLiteMaster.vhd.

◆ AxiLitePkg

AxiLitePkg
Package

Definition at line 24 of file AxiLiteMaster.vhd.

◆ AxiLiteMasterPkg

Definition at line 25 of file AxiLiteMaster.vhd.


The documentation for this class was generated from the following file: