SURF  1.0
AxiI2cSfpCore Entity Reference
+ Inheritance diagram for AxiI2cSfpCore:
+ Collaboration diagram for AxiI2cSfpCore:

Entities

mapping  architecture
 

Libraries

ieee 
unisim 

Use Clauses

std_logic_1164 
numeric_std 
StdRtlPkg  Package <StdRtlPkg>
AxiLitePkg  Package <AxiLitePkg>
I2cPkg  Package <I2cPkg>
AxiI2cSfpPkg  Package <AxiI2cSfpPkg>
vcomponents 

Generics

TPD_G  time := 1 ns
AXI_CLK_FREQ_G  real := 200 . 0E + 6
I2C_SCL_FREQ_G  real := 100 . 0E + 3
I2C_MIN_PULSE_G  real := 100 . 0E - 9
STATUS_CNT_WIDTH_G  natural range 1 to 32 := 32
ALLOW_TX_DISABLE_G  boolean := false
AXI_ERROR_RESP_G  slv ( 1 downto 0 ) := AXI_RESP_SLVERR_C

Ports

sfpIn   in AxiI2cSfpInType
sfpInOut   inout AxiI2cSfpInOutType
sfpOut   out AxiI2cSfpOutType
axiReadMaster   in AxiLiteReadMasterType
axiReadSlave   out AxiLiteReadSlaveType
axiWriteMaster   in AxiLiteWriteMasterType
axiWriteSlave   out AxiLiteWriteSlaveType
axiClk   in sl
axiRst   in sl

Detailed Description

See also
entity

Definition at line 32 of file AxiI2cSfpCore.vhd.

Member Data Documentation

◆ TPD_G

TPD_G time := 1 ns
Generic

Definition at line 34 of file AxiI2cSfpCore.vhd.

◆ AXI_CLK_FREQ_G

AXI_CLK_FREQ_G real := 200 . 0E + 6
Generic

Definition at line 35 of file AxiI2cSfpCore.vhd.

◆ I2C_SCL_FREQ_G

I2C_SCL_FREQ_G real := 100 . 0E + 3
Generic

Definition at line 36 of file AxiI2cSfpCore.vhd.

◆ I2C_MIN_PULSE_G

I2C_MIN_PULSE_G real := 100 . 0E - 9
Generic

Definition at line 37 of file AxiI2cSfpCore.vhd.

◆ STATUS_CNT_WIDTH_G

STATUS_CNT_WIDTH_G natural range 1 to 32 := 32
Generic

Definition at line 38 of file AxiI2cSfpCore.vhd.

◆ ALLOW_TX_DISABLE_G

ALLOW_TX_DISABLE_G boolean := false
Generic

Definition at line 39 of file AxiI2cSfpCore.vhd.

◆ AXI_ERROR_RESP_G

AXI_ERROR_RESP_G slv ( 1 downto 0 ) := AXI_RESP_SLVERR_C
Generic

Definition at line 40 of file AxiI2cSfpCore.vhd.

◆ sfpIn

Definition at line 43 of file AxiI2cSfpCore.vhd.

◆ sfpInOut

Definition at line 44 of file AxiI2cSfpCore.vhd.

◆ sfpOut

Definition at line 45 of file AxiI2cSfpCore.vhd.

◆ axiReadMaster

Definition at line 47 of file AxiI2cSfpCore.vhd.

◆ axiReadSlave

Definition at line 48 of file AxiI2cSfpCore.vhd.

◆ axiWriteMaster

Definition at line 49 of file AxiI2cSfpCore.vhd.

◆ axiWriteSlave

Definition at line 50 of file AxiI2cSfpCore.vhd.

◆ axiClk

axiClk in sl
Port

Definition at line 52 of file AxiI2cSfpCore.vhd.

◆ axiRst

axiRst in sl
Port

Definition at line 53 of file AxiI2cSfpCore.vhd.

◆ ieee

ieee
Library

Definition at line 18 of file AxiI2cSfpCore.vhd.

◆ std_logic_1164

std_logic_1164
Package

Definition at line 19 of file AxiI2cSfpCore.vhd.

◆ numeric_std

numeric_std
Package

Definition at line 20 of file AxiI2cSfpCore.vhd.

◆ StdRtlPkg

StdRtlPkg
Package

Definition at line 22 of file AxiI2cSfpCore.vhd.

◆ AxiLitePkg

AxiLitePkg
Package

Definition at line 23 of file AxiI2cSfpCore.vhd.

◆ I2cPkg

I2cPkg
Package

Definition at line 24 of file AxiI2cSfpCore.vhd.

◆ AxiI2cSfpPkg

AxiI2cSfpPkg
Package

Definition at line 25 of file AxiI2cSfpCore.vhd.

◆ unisim

unisim
Library

Definition at line 27 of file AxiI2cSfpCore.vhd.

◆ vcomponents

vcomponents
Package

Definition at line 28 of file AxiI2cSfpCore.vhd.


The documentation for this class was generated from the following file: