SURF  1.0
Generics | Ports | Libraries | Use Clauses
AxiI2cCxpReg Entity Reference
devices » transceivers » cxp
+ Inheritance diagram for AxiI2cCxpReg:
+ Collaboration diagram for AxiI2cCxpReg:

Entities

rtl  architecture
 

Libraries

ieee 

Use Clauses

std_logic_1164 
std_logic_unsigned 
std_logic_arith 
StdRtlPkg  Package <StdRtlPkg>
AxiLitePkg  Package <AxiLitePkg>
AxiI2cCxpPkg  Package <AxiI2cCxpPkg>
I2cPkg  Package <I2cPkg>

Generics

TPD_G  time := 1 ns
STATUS_CNT_WIDTH_G  natural range 1 to 32 := 32
AXI_ERROR_RESP_G  slv ( 1 downto 0 ) := AXI_RESP_SLVERR_C

Ports

i2cRegMasterIn   out I2cRegMasterInType
i2cRegMasterOut   in I2cRegMasterOutType
axiReadMaster   in AxiLiteReadMasterType
axiReadSlave   out AxiLiteReadSlaveType
axiWriteMaster   in AxiLiteWriteMasterType
axiWriteSlave   out AxiLiteWriteSlaveType
status   in AxiI2cCxpStatusType
config   out AxiI2cCxpConfigType
axiClk   in sl
axiRst   in sl

Detailed Description

See also
entity

Definition at line 30 of file AxiI2cCxpReg.vhd.

Member Data Documentation

◆ TPD_G

TPD_G time := 1 ns
Generic

Definition at line 32 of file AxiI2cCxpReg.vhd.

◆ STATUS_CNT_WIDTH_G

STATUS_CNT_WIDTH_G natural range 1 to 32 := 32
Generic

Definition at line 33 of file AxiI2cCxpReg.vhd.

◆ AXI_ERROR_RESP_G

AXI_ERROR_RESP_G slv ( 1 downto 0 ) := AXI_RESP_SLVERR_C
Generic

Definition at line 34 of file AxiI2cCxpReg.vhd.

◆ i2cRegMasterIn

i2cRegMasterIn out I2cRegMasterInType
Port

Definition at line 37 of file AxiI2cCxpReg.vhd.

◆ i2cRegMasterOut

i2cRegMasterOut in I2cRegMasterOutType
Port

Definition at line 38 of file AxiI2cCxpReg.vhd.

◆ axiReadMaster

axiReadMaster in AxiLiteReadMasterType
Port

Definition at line 40 of file AxiI2cCxpReg.vhd.

◆ axiReadSlave

axiReadSlave out AxiLiteReadSlaveType
Port

Definition at line 41 of file AxiI2cCxpReg.vhd.

◆ axiWriteMaster

axiWriteMaster in AxiLiteWriteMasterType
Port

Definition at line 42 of file AxiI2cCxpReg.vhd.

◆ axiWriteSlave

axiWriteSlave out AxiLiteWriteSlaveType
Port

Definition at line 43 of file AxiI2cCxpReg.vhd.

◆ status

status in AxiI2cCxpStatusType
Port

Definition at line 45 of file AxiI2cCxpReg.vhd.

◆ config

config out AxiI2cCxpConfigType
Port

Definition at line 46 of file AxiI2cCxpReg.vhd.

◆ axiClk

axiClk in sl
Port

Definition at line 48 of file AxiI2cCxpReg.vhd.

◆ axiRst

axiRst in sl
Port

Definition at line 49 of file AxiI2cCxpReg.vhd.

◆ ieee

ieee
Library

Definition at line 18 of file AxiI2cCxpReg.vhd.

◆ std_logic_1164

std_logic_1164
Package

Definition at line 19 of file AxiI2cCxpReg.vhd.

◆ std_logic_unsigned

std_logic_unsigned
Package

Definition at line 20 of file AxiI2cCxpReg.vhd.

◆ std_logic_arith

std_logic_arith
Package

Definition at line 21 of file AxiI2cCxpReg.vhd.

◆ StdRtlPkg

StdRtlPkg
Package

Definition at line 23 of file AxiI2cCxpReg.vhd.

◆ AxiLitePkg

AxiLitePkg
Package

Definition at line 24 of file AxiI2cCxpReg.vhd.

◆ AxiI2cCxpPkg

AxiI2cCxpPkg
Package

Definition at line 25 of file AxiI2cCxpReg.vhd.

◆ I2cPkg

I2cPkg
Package

Definition at line 26 of file AxiI2cCxpReg.vhd.

The documentation for this class was generated from the following file: