SURF  1.0
Generics | Ports | Libraries | Use Clauses
Ad9249Config Entity Reference
devices » AnalogDevices » ad9249
+ Inheritance diagram for Ad9249Config:
+ Collaboration diagram for Ad9249Config:

Entities

rtl  architecture
 

Libraries

ieee 
UNISIM 

Use Clauses

std_logic_1164 
std_logic_arith 
std_logic_unsigned 
VCOMPONENTS 
StdRtlPkg  Package <StdRtlPkg>
AxiLitePkg  Package <AxiLitePkg>

Generics

TPD_G  time := 1 ns
NUM_CHIPS_G  positive := 1
SCLK_PERIOD_G  real := 1 . 0e - 6
AXIL_CLK_PERIOD_G  real := 8 . 0e - 9
AXIL_ERR_RESP_G  slv ( 1 downto 0 ) := AXI_RESP_DECERR_C

Ports

axilClk   in sl
axilRst   in sl
axilReadMaster   in AxiLiteReadMasterType
axilReadSlave   out AxiLiteReadSlaveType
axilWriteMaster   in AxiLiteWriteMasterType
axilWriteSlave   out AxiLiteWriteSlaveType
adcPdwn   out slv ( NUM_CHIPS_G - 1 downto 0 )
adcSclk   out sl
adcSdio   inout sl
adcCsb   out slv ( NUM_CHIPS_G * 2 - 1 downto 0 )

Detailed Description

See also
entity

Definition at line 31 of file Ad9249Config.vhd.

Member Data Documentation

◆ TPD_G

TPD_G time := 1 ns
Generic

Definition at line 34 of file Ad9249Config.vhd.

◆ NUM_CHIPS_G

NUM_CHIPS_G positive := 1
Generic

Definition at line 35 of file Ad9249Config.vhd.

◆ SCLK_PERIOD_G

SCLK_PERIOD_G real := 1 . 0e - 6
Generic

Definition at line 36 of file Ad9249Config.vhd.

◆ AXIL_CLK_PERIOD_G

AXIL_CLK_PERIOD_G real := 8 . 0e - 9
Generic

Definition at line 37 of file Ad9249Config.vhd.

◆ AXIL_ERR_RESP_G

AXIL_ERR_RESP_G slv ( 1 downto 0 ) := AXI_RESP_DECERR_C
Generic

Definition at line 38 of file Ad9249Config.vhd.

◆ axilClk

axilClk in sl
Port

Definition at line 40 of file Ad9249Config.vhd.

◆ axilRst

axilRst in sl
Port

Definition at line 41 of file Ad9249Config.vhd.

◆ axilReadMaster

axilReadMaster in AxiLiteReadMasterType
Port

Definition at line 43 of file Ad9249Config.vhd.

◆ axilReadSlave

axilReadSlave out AxiLiteReadSlaveType
Port

Definition at line 44 of file Ad9249Config.vhd.

◆ axilWriteMaster

axilWriteMaster in AxiLiteWriteMasterType
Port

Definition at line 45 of file Ad9249Config.vhd.

◆ axilWriteSlave

axilWriteSlave out AxiLiteWriteSlaveType
Port

Definition at line 46 of file Ad9249Config.vhd.

◆ adcPdwn

adcPdwn out slv ( NUM_CHIPS_G - 1 downto 0 )
Port

Definition at line 48 of file Ad9249Config.vhd.

◆ adcSclk

adcSclk out sl
Port

Definition at line 49 of file Ad9249Config.vhd.

◆ adcSdio

adcSdio inout sl
Port

Definition at line 50 of file Ad9249Config.vhd.

◆ adcCsb

adcCsb out slv ( NUM_CHIPS_G * 2 - 1 downto 0 )
Port

Definition at line 53 of file Ad9249Config.vhd.

◆ ieee

ieee
Library

Definition at line 18 of file Ad9249Config.vhd.

◆ std_logic_1164

std_logic_1164
Package

Definition at line 19 of file Ad9249Config.vhd.

◆ std_logic_arith

std_logic_arith
Package

Definition at line 20 of file Ad9249Config.vhd.

◆ std_logic_unsigned

std_logic_unsigned
Package

Definition at line 21 of file Ad9249Config.vhd.

◆ UNISIM

UNISIM
Library

Definition at line 23 of file Ad9249Config.vhd.

◆ VCOMPONENTS

VCOMPONENTS
Package

Definition at line 24 of file Ad9249Config.vhd.

◆ StdRtlPkg

StdRtlPkg
Package

Definition at line 26 of file Ad9249Config.vhd.

◆ AxiLitePkg

AxiLitePkg
Package

Definition at line 27 of file Ad9249Config.vhd.

The documentation for this class was generated from the following file: