SRP Protocol

For carrying register and memory transactions across a Rogue stream link, Rogue provides rogue.protocols.srp. SRP bridges the memory interface and the stream interface: reads and writes are serialized into SRP frames, carried over a stream transport, and decoded by FPGA or ASIC logic that implements the corresponding SRP protocol.

In most deployed systems, SRP is not used by itself. It is usually combined with a transport/reliability stack such as UDP -> RSSI -> Packetizer or a DMA-backed stream path, with SRP providing the register-transaction semantics on top of that stream path.

Rogue documentation focuses on integration and usage. The wire-format protocol specifications are maintained externally:

C++ API details for SRP protocol classes are documented in rogue::protocols::srp.

Choosing SRP Version

Where SRP Fits

  • SRP bridges memory transactions to stream transport.

  • Tree-facing configuration and register semantics remain in PyRogue device definitions.

  • Transport selection and tuning belong in the lower stream and protocol layers such as Network Wrapper, UDP Protocol, and AxiStreamDma.

Common Integration Patterns

  • PyRogue tree pattern: create SrpV0 or SrpV3, connect it to stream transport, then pass the SRP object as memBase when constructing Devices.

  • Standalone script pattern: use SRP + stream transport directly without a Root when you only need a narrow read/write utility path.

  • Command path pattern: use SRP Protocol Command for opcode/context control channels that are intentionally separate from register-access transactions.