Supported Boards

The following application repos target different Xilinx Zynq UltraScale+ SoC boards using the axi-soc-ultra-plus-core platform. Each repo contains a board-specific FPGA target under firmware/targets/<TargetName>/ with its own top-level VHDL entity, XDC constraints, and ruckus.tcl build script.

Simple-*-Example Application Repos

Repo	Board model	Xilinx part number	Target dir name	Notes
Simple-rfsoc-4x2-Example	RealDigital RFSoC 4x2	xczu48dr-ffvg1517-2-e	SimpleRfSoc4x2Example	Verified end-to-end
Simple-Kria-Kv260-Example	Xilinx KV260 Vision AI Starter Kit	xck26-sfvc784-2lv-c	SimpleKriaKv260Example	Pending verification
Simple-ZCU102-Example	Xilinx ZCU102	xczu9eg-ffvb1156-2-e	SimpleZcu102Example	Pending verification
Simple-ZCU111-Example	Xilinx ZCU111	xczu28dr-ffvg1517-2-e	SimpleZcu111Example	Pending verification
Simple-ZCU208-Example	Xilinx ZCU208	xczu48dr-fsvg1517-2-e	SimpleZcu208Example	Pending verification
Simple-ZCU216-Example	Xilinx ZCU216	xczu49dr-ffvf1760-2-e	SimpleZcu216Example	Pending verification
Simple-ZCU670-Example	Xilinx ZCU670	xczu67dr-fsve1156-2-e	SimpleZcu670Example	Pending verification

Finding the target directory name

The target directory name maps directly to the Vivado project name and to the top-level VHDL entity. To find the name for any repo, inspect the Makefile:

cat firmware/targets/<TargetName>/Makefile | grep PRJ_PART

The Makefile PRJ_PART variable also carries the authoritative Xilinx device part string used during synthesis.